One form of semiconductor memory is a nonvolatile memory in which the memory state of a memory cell is determined by whether or not an electrical charge is stored on a charge storage layer built into the gate structure of a field effect transistor. To enhance the storage capacity of such a nonvolatile memory, two storage nodes can be built into each memory cell. The storage nodes are associated with locations in charge storage layers at opposite sides of the gate structure. As the capacity of semiconductor memories increases, the size of each individual device used to implement the memory shrinks in size. With a memory that uses dual storage nodes per memory cell, the reduction in device size means that the spacing between the two storage nodes of a memory cell decreases. As the spacing between storage nodes decreases, problems arise with respect to the reliability and retention of the memory data.
Accordingly, it is desirable to provide methods for fabricating semiconductor memory devices that permit scaling of a dual storage node memory cell without adversely affecting device reliability or memory retention. In addition, it is desirable to provide reliable dual storage node memory devices that can be readily scaled to reduced device dimensions. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.